India's most valuable chip design startup is valued at just $450 million, while the government has allocated Rs 1.27 trillion ($15 billion) to change that. Last week, the Indian government unveiled a radical new approach under its Semicon 2.0 program: instead of just handing out grants, it will co-invest alongside venture capital funds in chip design startups, taking equity stakes and sitting alongside private investors as a partner rather than a grantor.
This marks a fundamental shift in how India approaches its semiconductor ambitions. The equity co-investment model, announced Wednesday by the Ministry of Electronics and Information Technology, is designed to solve a specific problem that has plagued India's chip design ecosystem: the chronic shortage of patient, deep-tech capital at the early stages where startups need it most.
How the Equity Co-Investment Model Works
Under the new framework, a chip design startup that needs $10 million in early-stage capital can get the government to match $5 million of it, provided the startup raises the other $5 million from a qualified private venture capital investor. The government takes equity at the same valuation as the VC, for the same amount of equity. This is not a loan, not a grant with strings attached, and not a convertible note. It is direct equity ownership by the state in a private technology company.
Amitesh Sinha, additional secretary at MeitY and CEO of the India Semiconductor Mission, explained the rationale directly: the government will first offer grants for startups to create chip design prototypes. Those prototypes then become the basis for raising VC funding. Once a startup secures private capital, the government matches it. Sinha specifically noted that the government will not enter these investments with a fixed expiry date or a mandated exit timeline. When the startup begins generating revenue, it has the option to buy back the government's shares, but there is no forced timeline for doing so.
This is a dramatically different approach from the standard government venture model, where agencies typically impose sunset clauses or require repayment within a set number of years. By removing the exit pressure, the government signals that it understands semiconductor development timelines, which often run 5 to 10 years before meaningful revenue materializes.
Why Chip Design Needs Patient Capital
India's first semiconductor design scheme under the 2021 India Semiconductor Mission offered just Rs 15 crore per startup in funding support. For a chip design company that needs to pay for tapeout costs, prototype fabrication, EDA tool licenses, and engineering talent, Rs 15 crore is barely enough to get started. The result was a weak response from the ecosystem. No Indian chip design startup has crossed the $1 billion valuation mark. The current leader, Bengaluru-based Tessolve Semiconductor, raised $150 million from TPG at a $450 million valuation, making it India's most valuable semiconductor startup, but still far from the unicorn club.
The capital intensity of chip design is often underestimated by policymakers who see it as just software. In reality, a single tapeout at a modern process node can cost millions of dollars, and each design iteration carries the risk of a failed mask set. Unlike a SaaS company where a failed feature means a rollback, a failed chip tapeout means millions in sunk costs. This structural risk profile demands investors who understand the technology cycle and have the patience to wait through it.
Deep-tech venture capital in India remains underdeveloped compared to the SaaS and fintech ecosystems. While Indian startups raised over $25 billion in 2025 across all sectors, the share going to semiconductor design was negligible. The government's co-investment model addresses this by effectively de-risking the investment for VCs: when the government puts in matching capital at the same terms, a VC's effective cost basis is halved, making the risk-reward calculation significantly more attractive.
What This Means for Founders and Investors
For chip design founders in India, this is the most favorable government policy ever introduced for their sector. The equity co-investment model means founders will have more capital per round without giving up additional dilution to any single investor. A founder raising a $10 million Series A with a $5 million government match effectively gets $10 million of runway while only issuing equity for the $5 million the VC provided, plus the government's matching share. This translates to longer runways, more design iterations, and a higher probability of reaching a production-ready chip.
For VCs, the model removes a key objection to investing in semiconductor startups: the fear that a portfolio company will run out of capital before reaching revenue. With the government as a co-investor, startups gain access to follow-on capital from a partner who is financially aligned and strategically motivated to see the company succeed. The government's explicit statement that it has no fixed exit timeline means founders and VCs can plan for a long-term technology build rather than a forced liquidity event.
There are also implications for the larger corporate players. For the first time, the government will also support larger conglomerates in chip design through royalty-based incentives. This creates a two-track system: equity co-investment for startups and early-stage companies, and royalty-linked incentives for established players who have already ventured into semiconductor design. The intent is to build a complete ecosystem from garage-stage startups to vertically integrated corporations, all generating intellectual property that India can call its own.
India's Broader Semiconductor Ambitions
The Semicon 2.0 program arrives as the global semiconductor landscape undergoes a once-in-a-generation restructuring. The CHIPS Act in the United States, the European Chips Act, and massive investments in Japan, South Korea, and Taiwan have made semiconductor sovereignty a national priority for every major economy. India, which has historically been a consumer of chips rather than a producer, is attempting to leapfrog directly into the design part of the value chain, where margins are higher and intellectual property generates long-term value.
IT Minister Ashwini Vaishnaw has made it clear that chip design companies will be a cornerstone of Semicon 2.0. The government wants India to generate its own semiconductor intellectual property, reducing dependence on foreign chip designs and creating a technology export capability that goes beyond IT services. This aligns with India's broader push toward electronics manufacturing under the production-linked incentive scheme, but design is a higher-value activity than assembly.
The challenge ahead is execution. The equity co-investment model requires the government to act like a VC fund: evaluating startups, negotiating terms, managing a portfolio, and eventually exiting. This is not a traditional government competency. The India Semiconductor Mission will need to build internal capabilities in venture investing, or partner with third-party fund managers who can deploy capital on the government's behalf. The quantum of funds allocated to this specific co-investment plan has not been disclosed, which leaves a critical question unanswered: how much firepower does the government actually have for this strategy?
For founders evaluating whether to participate, the calculus is straightforward. Having the government as a co-investor brings not just capital but also regulatory alignment, potential government customers, and a long-term partner who benefits from your success. The option to buy back government shares once revenue starts means founders can eventually regain full control of their company. It is a model that, if executed well, could transform India's chip design ecosystem from a handful of venture-backed companies into a thriving industry capable of producing globally competitive semiconductor intellectual property.
